The present invention relates to a method for mounting electronic components on an insulating layer, and a method for manufacturing an electronic component-embedded substrate.
In general, a substrate (an electronic component-embedded substrate) on which electronic components such as semiconductor devices (an IC and another semiconductor active device) are mounted has a structure in which the semiconductor devices (dies) having a bare chip state are fixed to the substrate including a single resin layer or a plurality of resin layers, and to meet demands for high performance and miniaturization of an electronic device, development of a module has been advanced on which active components such as the semiconductor devices and passive components such as resistances and capacitors are highly densely mounted.
In recent years, with regard to portable devices typified by a portable terminal such as a cellular phone, mounting with a density much higher than every before has been demanded, and these days, especially a demand for thinning has risen. On the other hand, also with regard to the electronic component-embedded substrate for use in such a portable device, higher densification and thinning are earnestly demanded, and further thinning of the electronic components themselves also rapidly advances.
In such a situation, a highly dense mounted module constituted in which electronic components such as a plurality of semiconductor devices are embedded in one module is put to practical use, and a module in which a plurality of semiconductor bare chips are laminated in multiple stages on one surface of the substrate is disclosed in, for example, Japanese Patent Application Laid-Open No. 8-88316.
In addition, to assemble the electronic components such as the plurality of semiconductor devices in multiple stages is one means for the highly dense mounting, but in view of arrangement with passive components such as the resistances and capacitors to be mounted on the module, a problem of heat discharge accompanying a high-speed operation of the semiconductor device and the like, or in a case where there is not any strict restriction on a planar dimension of the substrate, the plurality of electronic components are sometimes arranged on a single layer. Moreover, since an outer size of each semiconductor bare chip is reduced, there are sometimes demanded further thinning due to the highly dense mounting in a horizontal direction and higher densification due to the arrangement of the plurality of electronic components in the multiple stages and the respective layers. Furthermore, as disclosed in Japanese Patent Application Laid-Open No. 8-88316, to mount the electronic components in the multiple stages, after bonding and fixing one electronic component to a base or the like, it is unavoidably necessary to bond and fix the next-stage electronic component on the one component. Therefore, much time is required for manufacturing, and this is disadvantageous from a viewpoint of production efficiency.
However, it cannot necessarily be said that the mounting of the electronic components on a single layer, nit in the multiple stages, is advantageous from the viewpoint of the production efficiency. That is, as disclosed in, for example, Japanese Patent Application Laid-Open No. 8-88316, to fix the semiconductor devices to arrangement portions of the base or the like, the devices need to be fixed to the portions one by one using an adhesive.
Moreover, a method is known in which a plurality of electronic components are arranged on a resin layer by use of an unhardened resin layer as the adhesive, and the resin layer is hardened to fix both the components and the layer. However, in a case where it is prevented that foaming (a void) is generated in a bonding interface between both the components and the layer and that a securing property deteriorates, after the electronic components are pressed to the resin layer for a sufficient time, the resin layer needs to be hardened. For this purpose, a method is employed in which, for example, a ceramic-made grasping tool (e.g., a jig such as a collet for use in a die bonder unit) is usually attached to one surface of each electronic component to hold the electronic component by adsorption or the like, an opposite surface of the electronic component in this state is allowed to abut on the resin layer or the like and tentatively set, further the pressure is applied to the front surface of the electronic component with the grasping tool to attach and press the component to the resin layer or the like, and this procedure is performed on the plurality of electronic components in order.
However, in such a method, several seconds to several ten seconds are required for pressing one electronic component to the resin layer. Therefore, for example, to mount a large number of electronic components on the resin layer of the substrate having a comparatively large size, much time including another handling time is required for completion (according to findings of the present inventor, it is not rare that several hours or more are required). During this mounting, since the unhardened resin for bonding is retained in a heated state to a certain degree in order to maintain flexibility suitable for the bonding, and is exposed to the atmosphere, the resin is gradually hardened, absorbs humidity and is thus variously influenced. In this case, from the start of the mounting of the electronic components on the resin layer to the completion of the mounting, with an elapse of time, the resin state (physical property) changes (deteriorates), and hence a mounting defect (a bonding defect and generation of the void) of the electronic components on the resin layer might occur.